Aprisa place-and-route tool for low-power SoCs

18 Pages

The document introduces Aprisa, a place-and-route tool designed for low-power System-on-Chips (SoCs). It emphasizes Aprisa's capabilities in optimizing power efficiency while meeting performance and area requirements. Key features include advanced algorithms for power-aware placement and routing, support for multiple design styles, and integration with leading design flows. Aprisa enables designers to achieve significant power savings in SoC designs without compromising performance, making it a valuable tool for low-power semiconductor development.

Join for free to read

White Paper Aprisa place-and-route for low-power SoCs

White Paper Placement and CTS techniques for high- performance computing…

Case Study Low-Power Implementation on Freescale Kinetis Family

White Paper ULTRA LOW POWER 8K UHD TRANSCODING SOLUTION

More from Siemens

White Paper Aprisa place-and-route for low-power SoCs

White Paper Placement and CTS techniques for high- performance computing…

White Paper Making the Right Connections in 3D IC Design

Ebook Ensuring 3D IC semiconductor reliability

White Paper

Aprisa place-and-route tool for low-power SoCs

Aprisa place-and-route tool for low-power SoCs

You Might Also Like

More from Siemens