F5 Networks Saves 25% on Power and 12% on Area Using Cadence Encounter RTL Compiler
F5 Networks Saves 25% on Power and 12% on Area Using Cadence Encounter RTL Compiler
2 PagesSUCCESS STORY CORPORATE PROFILE • F 5 N e t w o r k s i s a g l o b a l l e a d e r i n application traf fic management DESIGN CHALLENGE • D e s i g n a n A S I C t h a t w a s a p p r o x i m a t e l y f o u r t i m e s l a r g e r t h a n p r e v i o u s d e s i g n s i n b o t h s i l i c o n a r e a and gate count • A p p l y n e w m e t h o d o l o g y t o d e a l w i t h c
