SUCCESS STORY CADENCE AND TERABLAZE ENCOUNTER RTL COMPILER ENABLES FASTER TIME TO QUALITY OF SILICON FOR COMPLEX ASIC DESIGN TeraBlaze set out to create a next-generation switching architecture for the internet and enterprise networking markets. The resulting design was a complex multi-million- gate ASIC with timing and area challenges that their current synthesis tool could not handle. They were faced with the challenge of replacing a tool mid-

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